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Woodlands, Singapore
2026-04-16
GlobalFoundries
Southeast Asia
Engineering WSDegree Intern – CMP Process Engineering
Role Description
**About GlobalFoundries**
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GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most innovative technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries enables the technologies that transform industries and empower customers to shape their markets. Learn more at **www.gf.com** .
**Role Summary**
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GlobalFoundries Singapore is seeking highly motivated **Engineering WSDegree Interns** to join our state-of-the-art semiconductor manufacturing facility. This role is designed to progressively develop interns from foundational semiconductor process learning to in-depth CMP process engineering exposure, culminating in a Final Year Project (FYP) aligned with real-world fab challenges.
**Key Responsibilities**
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### **Block 1: Foundational Learning \& Exploration**
* Acquire fundamental knowledge of the semiconductor industry and wafer manufacturing processes
* Understand the function and purpose of Chemical Mechanical Planarization (CMP) within a wafer fab
* Learn cleanroom protocols, safety requirements, and fab operations standards
* Gain exposure to quality, process, and manufacturing control methodologies
* Learn CMP process fundamentals, materials, consumables, and process flow
* Become familiar with MES, fab operations, and engineering systems
* Job shadow CMP Process Engineers to understand daily operations
### **Block 2: Process Study, Data Analysis \& Troubleshooting**
* Deepen understanding of wafer processing and CMP process flows
* Learn about process parameters, configurations, and optimization techniques
* Perform data analysis and basic troubleshooting to improve process performance
* Monitor wafer quality performance using tools such as Statistical Process Control (SPC) and Fault Detection \& Classification (FDC)
### **Block 3 \& Final Year Project (FYP): Engineer‑in‑Training Development**
* Work with an assigned mentor to define FYP scope, objectives, and resources
* Execute an FYP aligned to CMP process engineering, with increased technical depth and challenge
* Study process capability and collaborate with cross-functional partners to perform DOE (Design of Experiments) for CMP material evaluation and qualification
* Analyze data to improve process stability, defect reduction, and yield performance
* Participate in continuous improvement initiatives supporting cost, quality, or productivity
* Complete FYP under guidance of an industrial mentor
**Skills \& Experience Gained**
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### **Technical Skills**
* Hands-on experience in semiconductor manufacturing
* Strong understanding of wafer fabrication processes and CMP functionality
* Knowledge of SPC, FDC, process control systems, and metrology
* Independent data analysis and structured problem-solving
### **Soft Skills**
* Effective presentation and communication skills
* Collaboration within cross-functional and dynamic teams
* Exposure to AI and Machine Learning concepts and applications
### **Practical Experience**
* Work in a state-of-the-art cleanroom environment
* Project management experience in a cross-functional setting
* Networking opportunities, including management roundtables and inter-department engagement
**Required Qualifications**
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* Enrolled in a **Mechanical, Chemical, Materials, Electrical, or Electronics Engineering** degree
* Strong analytical and problem-solving skills
* Curious, proactive, and eager to learn
* Creative, innovative, and detail-oriented
* Strong time management and communication skills
* Positive mindset with strong teamwork capabilities
**Additional Information**
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* This role is **exclusively for students enrolled in the WSDegree Programme (2026 intake)**
* **Internship period must be clearly stated** in your CV, resume, or cover letter
Information about our benefits you can find here: https://gf.com/about-us/careers/opportunities-asia