Back to jobs
Cadence Design Systems
Western Europe

Application Engineering Intern – AI-based Formal Verification (f/m/d)

München, Germany
2026-06-11

Role Description

**At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.** ----------------------------------------------------------------------------------------------------------------- **About the Role** ------------------ At Cadence, we are committed to driving innovation in electronic design and verification technologies. We are seeking a highly motivated Software Engineering Intern to join our Application Engineering team. In this role, you will contribute to the exploration and development of AI/ML-driven approaches to enhance formal verification workflows, working closely with experienced engineers on cutting-edge challenges in semiconductor design and verification. **What You Will Do** -------------------- * Contribute to the development and evaluation of LLM/ML-based approaches for formal verification workflows * Analyse technical data and extract meaningful insights to support verification use cases * Collaborate with experienced engineers to prototype and validate new concepts * Develop and present results, including technical documentation and reports * Support the integration of new solutions into existing verification workflows * Work closely with R\&D teams to refine problem statements and advance innovative solutions **What We Are Looking For (Essential)** --------------------------------------- ### **Education \& Technical Skills** * Currently pursuing a degree in Electrical/Electronic Engineering, Computer Science, or Computer Engineering * Fundamental programming skills in Python * Basic understanding of machine learning, generative AI, and data analysis * Basic understanding of formal verification concepts * Familiarity with Linux/Unix environments and scripting ### **Core Competencies** * Interest in applying AI/ML techniques to real-world semiconductor challenges * Strong analytical and problem-solving skills * Good communication skills and ability to work in a collaborative environment * Proactive, solution-oriented mindset **Nice to Have (Preferred)** ---------------------------- * Fundamental understanding of VLSI and IC design and HDLs like SystemVerilog * Exposure to hardware formal verification tools such as Jasper * Experience verifying simple RTL designs using formal techniques * Familiarity with data processing frameworks or machine learning libraries **Career Benefits and Growth** ------------------------------ Join a team at the forefront of AI-driven innovation in functional verification. This internship provides the opportunity to: * Work on impactful, real-world engineering challenges * Gain hands-on experience with advanced verification and AI technologies * Collaborate with experts in both AI/ML and semiconductor verification * Contribute to solutions used across the global semiconductor industry **Benefits We Offer** --------------------- * Fair internship compensation * Housing allowance for interns from abroad * 30 days annual leave * Meal vouchers * Public transport ticket * Hybrid working model in a modern office environment **Apply Today** --------------- If you are passionate about AI and eager to contribute to next-generation verification solutions, we would love to hear from you. **We’re doing work that matters. Help us solve what others can’t.** -------------------------------------------------------------------

Application Engineering Intern – AI-based Formal Verification (f/m/d)

Cadence Design Systems

Sign Up →